On Thu, Aug 22, 2019 at 03:05:48PM -0500, Bjorn Helgaas wrote: > From: Bjorn Helgaas <bhelgaas@xxxxxxxxxx> > > Reads from a PCI device may fail if the device has been turned off (put > into D3cold), removed, or if some other error occurs. The PCI host bridge > typically fabricates ~0 data to complete the CPU's read. > > We check for that in a few places, but not in a consistent way. This > series adds a PCI_ERROR_RESPONSE definition to make the checks more > consistent and easier to find. Note that ~0 may indicate a PCI error, but > it may also be valid read data, so you need more information (such as > knowing that a register can never contain ~0) before concluding that it's > an error. > > This series also adds a new check for PCI_ERROR_RESPONSE in the power > management code because that code frequently encounters devices in D3cold, > where we previously misinterpreted ~0 data. It also uses pci_power_name() > to print D-state names more consistently. > > Rafael, I didn't add your Reviewed-by to "PCI / PM: Return error when > changing power state from D3cold" because I made small changes to try to > make the messages more consistent, and I didn't want to presume they'd be > OK with you. > > Changes since v1: > - Add Rafael's Reviewed-By to the first two patches > - Drop "PCI / PM: Check for error when reading PME status" because Rafael > pointed out that some devices can signal PME even when in D3cold, so > this would require additional rework > - Drop "PCI / PM: Check for error when reading Power State" because > Rafael thinks it's mostly redundant > > Bjorn Helgaas (3): > PCI: Add PCI_ERROR_RESPONSE definition > PCI / PM: Decode D3cold power state correctly > PCI / PM: Return error when changing power state from D3cold For the whole series, Reviewed-by: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx>
