Re: [PATCH] PCI: Blacklist power management of Gigabyte X299 DESIGNARE EX PCIe ports

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On Wed, Dec 19, 2018 at 06:09:15PM +0100, Lukas Wunner wrote:
> > I think better example where this fails is normal Thunderbolt device
> > (not host) which includes PCIe switch and there is an PCIe endpoint, say
> > network interface connected to one of the downstream ports. That
> > downstream port has "Slot implemented" set but is not hotplug capable.
> > 
> > So the device would work correctly but if you take the recent "Runtime
> > D3, RTD3" system such as Lenovo Carbon X1 6th gen it keeps the whole
> > PCIe hierarchy from entering D3cold. I would rather not to break that ;-)
> 
> Yeah but as you say, those are Downstream Ports.  What if you constrain
> it to Root Ports?

Yes, that could work. I did not test it yet, though. Thinking this bit
further maybe we can contstrain it to ports that have slot implemented
set and have an ACPI companion instead of just root ports? Point being
that ports without ACPI companion could not possibly get ACPI Notify()
either.



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