On Thu, Sep 06, 2018 at 01:42:15PM +0200, Lukas Wunner wrote: > On Wed, Sep 05, 2018 at 02:35:29PM -0600, Keith Busch wrote: > > --- a/drivers/pci/pci.c > > +++ b/drivers/pci/pci.c > > @@ -4485,21 +4485,33 @@ bool pcie_wait_for_link(struct pci_dev *pdev, bool active) > > bool ret; > > u16 lnk_status; > > > > + /* > > + * PCIe 4.0r1 6.6.1, a component must enter LTSSM Detect within 20ms, > > + * after which we should expect an link active if the reset was > > + * successful. If so, software must wait a minimum 100ms before sending > > + * configuration requests to devices downstream this port. > > + * > > + * If the link fails to activate, either the device was physically > > + * removed or the link is permanently failed. > > + */ > > + if (active) > > + msleep(20); > > This function is also called by pciehp when bringing up the slot, > yet I assume the above delay only applies to a Fundamental Reset, > not hotplug? Should be any conventional reset, which includes the "cold reset" applying power to a hot add component. > > + if (active && ret) > > + msleep(100); > > This delay is already observed by pciehp_check_link_status() > after calling pcie_wait_link_active(). Yeah, that's gone in patch 13. This series became larger than I originally expected, and there might be a more logical shuffling.
