On Fri, Aug 31, 2018 at 03:18:15PM -0700, Sinan Kaya wrote: > On 8/31/2018 2:26 PM, Keith Busch wrote: > > This is safe because the pciehp and DPC drivers share the same > > interrupt. The DPC driver sets the bus state in the top-half interrupt > > context, and the pciehp driver checks and masks off link events in its > > bottom-half error handler. > > Where is this coming from? Is there a spec reference? > > DPC and HP interrupts can be implemented as MSI-x interrupts and could > be unrelated interrupt IDs? Darn, you're right. The kernel allocates up to 32 vectors and the port is free to divvy them up however it wants amont its supported services. It just so happened most of the ports I tested used the same one. There's no way to really close this race if they are separate vectors though, so maybe just leave this as a 'best effort' approach and update the change log accodingly.
