On 09/08/18 01:47 PM, Kit Chow wrote: >> I haven't tested this scenario but my guess would be that IOAT would >> indeed go through the IOMMU and the PCI BAR address would need to be >> properly mapped into the IOAT's IOVA. The fact that you see DMAR errors >> is probably a good indication that this is the case. I really don't know >> why you'd want to DMA something without mapping it. > I have experimented with changing ntb_async_tx_submit to dma_map the PCI > BAR > address. With this, I get a different DMAR error: What code did you use to do this? > DMAR: [DMA Write] Request device [07:00.4] fault addr ffd00000 > [fault reason 12] non-zero reserved fields in PTE Also, what device corresponds to 07:00.4 on your system? Logan
