Add a callback to define the maximum number of vectors used by the RC.
Since this is a parameter associated to each SoC IP setting, makes sense
to be configurable and easily visible to future modifications.
Set DesignWare driver vectors number maximum to 256.
Signed-off-by: Gustavo Pimentel <gustavo.pimentel@xxxxxxxxxxxx>
Acked-by: Joao Pinto <jpinto@xxxxxxxxxxxx>
Acked-by: Jingoo Han <jingoohan1@xxxxxxxxx>
---
drivers/pci/dwc/pcie-designware-plat.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/pci/dwc/pcie-designware-plat.c b/drivers/pci/dwc/pcie-designware-plat.c
index 5416aa8..80a2782 100644
--- a/drivers/pci/dwc/pcie-designware-plat.c
+++ b/drivers/pci/dwc/pcie-designware-plat.c
@@ -38,8 +38,14 @@ static int dw_plat_pcie_host_init(struct pcie_port *pp)
return 0;
}
+static void dw_plat_set_num_vectors(struct pcie_port *pp)
+{
+ pp->num_vectors = MAX_MSI_IRQS;
+}
+
static const struct dw_pcie_host_ops dw_plat_pcie_host_ops = {
.host_init = dw_plat_pcie_host_init,
+ .set_num_vectors = dw_plat_set_num_vectors,
};
static int dw_plat_add_pcie_port(struct pcie_port *pp,
--
2.7.4
