On Wed, Mar 28, 2018 at 20:37, Bjorn Helgaas wrote: > On Wed, Mar 28, 2018 at 01:24:10PM +0000, Alan Douglas wrote: > > > On 28/03/2018 12:51, Niklas Cassel wrote: > > > cdns_pcie_ep_set_bar() does some round-up of the BAR size, which > > > means that a 64-bit BAR can be set-up, even when the flag > > > PCI_BASE_ADDRESS_MEM_TYPE_64 isn't set. > > > > > If a 64-bit BAR was set-up, set the flag > PCI_BASE_ADDRESS_MEM_TYPE_64, so that the calling function can know > what BAR width that was actually set-up. > > > > > I'm not sure why cdns_pcie_ep_set_bar() doesn't obey the flag > PCI_BASE_ADDRESS_MEM_TYPE_64, but I leave this for the MAINTAINER to > fix, since there might be a reason why > this flag is ignored. > > Will investigate and fix this in future patch > > > > > Signed-off-by: Niklas Cassel <niklas.cassel@xxxxxxxx> > > > --- > > > drivers/pci/cadence/pcie-cadence-ep.c | 3 +++ > > > 1 file changed, 3 insertions(+) > > > > > Change looks good to me. > > It will be helpful to Lorenzo if you spell this out, e.g., > > Acked-by: Alan Douglas <adouglas@xxxxxxxxxxx> Acked-by: Alan Douglas <adouglas@xxxxxxxxxxx> > > Also, it looks like we need a MAINTAINERS update to add drivers/pci/cadence/ > to the "PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS" > filename patterns. Lorenzo please let me know if I should create a patch for this, it sounds good to me.
