Hi Niklas, On 28/03/2018 12:50, Niklas Cassel wrote: > Since a 64-bit BAR consists of a BAR pair, we need to write to both > BARs in the BAR pair to clear the BAR properly. > > Signed-off-by: Niklas Cassel <niklas.cassel@xxxxxxxx> > --- > drivers/pci/dwc/pcie-designware-ep.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/pci/dwc/pcie-designware-ep.c b/drivers/pci/dwc/pcie-designware-ep.c > index cc4d8381c1dc..4d304e3ccf24 100644 > --- a/drivers/pci/dwc/pcie-designware-ep.c > +++ b/drivers/pci/dwc/pcie-designware-ep.c > @@ -28,6 +28,10 @@ static void __dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar, > dw_pcie_dbi_ro_wr_en(pci); > dw_pcie_writel_dbi2(pci, reg, 0x0); > dw_pcie_writel_dbi(pci, reg, 0x0); > + if (flags & PCI_BASE_ADDRESS_MEM_TYPE_64) { > + dw_pcie_writel_dbi2(pci, reg + 4, 0x0); > + dw_pcie_writel_dbi(pci, reg + 4, 0x0); > + } > dw_pcie_dbi_ro_wr_dis(pci); > } > > Seems good to me. :) Reviewed-by: Gustavo Pimentel <gustavo.pimentel@xxxxxxxxxxxx>