On Tue, Mar 06, 2018 at 03:24:18PM +0100, Lucas Stach wrote:
> Am Dienstag, den 06.03.2018, 11:54 +0000 schrieb Gustavo Pimentel:
> > Implement a multiplexed IRQ domain hierarchy API in the pcie-designware
> > host bridge driver that funnels all MSI IRQs into a single parent
> > interrupt, moving away from the obsolete struct msi_controller based
> > API.
> >
> > Although the old implementation API is still available, pcie-designware
> > will now use the multiplexed IRQ domains hierarchical API.
> >
> > Remove all existing dwc based host bridges MSI IRQs handlers, in that the
> > hierarchical API now handles MSI IRQs through the hierarchical/chained
> > MSI domain implementation.
> >
> > > Signed-off-by: Gustavo Pimentel <gustavo.pimentel@xxxxxxxxxxxx>
> > > Tested-by: Niklas Cassel <niklas.cassel@xxxxxxxx>
> > > Tested-by: Shawn Guo <shawn.guo@xxxxxxxxxx>
> > > Acked-by: Jingoo Han <jingoohan1@xxxxxxxxx>
> > > Acked-by: Marc Zyngier <marc.zyngier@xxxxxxx>
> > ---
> [...]
> > +static int dw_pcie_irq_domain_alloc(struct irq_domain *domain,
> > > + unsigned int virq, unsigned int nr_irqs,
> > > + void *args)
> > +{
> > > + struct pcie_port *pp = domain->host_data;
> > > + unsigned long flags;
> > > + unsigned long bit;
> > > + u32 i;
> > +
> > > + raw_spin_lock_irqsave(&pp->lock, flags);
> > +
> > > + bit = bitmap_find_free_region(pp->msi_irq_in_use, pp->num_vectors,
> > > + order_base_2(nr_irqs));
> > +
> > > + raw_spin_unlock_irqrestore(&pp->lock, flags);
> > +
> > > + if (bit < 0)
> > + return -ENOSPC;
>
> bit is an unsigned variable here, so this condition will never be true.
I have fixed it up in my pci/dwc-msi branch, thanks for reporting it.
Lorenzo
> > +
> > > + for (i = 0; i < nr_irqs; i++)
> > > + irq_domain_set_info(domain, virq + i, bit + i,
> > > + &dw_pci_msi_bottom_irq_chip,
> > > + pp, handle_edge_irq,
> > > + NULL, NULL);
> > +
> > > + return 0;
> > +}
>
> Regards,
> Lucas
