From: Hou Zhiqiang <Zhiqiang.Hou@xxxxxxx>
Drop the change for qcom pcie driver's fixup from 9/9, it seems qcom
pcie controller did not implement the register MISC_CONTROL_1_OFF.
Hou Zhiqiang (9):
PCI: layerscape: Add dw_pcie_setup_rc to ls-pcie common host init
PCI: layerscape: move STRFMR1 access out from the DBI write-enable
bracket
PCI: layerscape: add class code and multifunction fixups for ls1021a
PCI: layerscape: refactor the host_init function
PCI: layerscape: Disable the outbound windows configured by bootloader
PCI: designware: add accessors for write permission of DBI read-only
registers
PCI: layerscape: use accessors to enable/disable DBI RO registers'
write permission
PCI: designware: enable write permission before updating DBI RO
registers
PCI: dwc: remove the obsolete fixups
drivers/pci/dwc/pci-layerscape.c | 90 ++++++++++++++++++----------------
drivers/pci/dwc/pcie-artpec6.c | 6 ---
drivers/pci/dwc/pcie-designware-host.c | 6 +++
drivers/pci/dwc/pcie-designware.h | 25 ++++++++++
4 files changed, 80 insertions(+), 47 deletions(-)
--
2.14.1
