Re: Question: PCIe DPC not allowing for link retraining and bus re-scan

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On Tue, Jan 31, 2017 at 09:35:58AM +0000, Gabriele Paoloni wrote:
> I don't mind writing the patches but currently I also do not have a
> platform to test on.
> 
> Do you know if there is any Intel Server/Desktop with full support of
> DPC on the RP including "Software Triggering of DPC" (maybe some
> machines that are out on the market but you do not have there with you)?

Currently available Intel offerings do not have eDPC capable root ports.
I use switches from Microsemi and PLX with these capabilities on their
downstream ports so I'm limited to non-root port testing at the moment.

> As an alternative I am thinking that maybe I can find a switch with
> full DPC support including "Software Triggering of DPC". In this case
> we test anything except the RP Busy bit...
> 
> The idea is to have a sort of DPC SW Injection module to test DPC.

I think you can s/w inject from userspace with setpci:

  # setpci -s <B:D.f> ECAP_DPC+6.w=40:40

The port has to have a software trigger capability. I can get such a
switch, but don't have one immediately available.

Anyway, I'll write a couple patches and post them when I can get
validation. Thank you for pointing out the current gaps.
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