> -----Original Message----- > From: Pratyush Anand [mailto:pratyush.anand@xxxxxxxxx] > Sent: Thursday, September 10, 2015 5:30 PM > To: Gabriele Paoloni; Bjorn Helgaas > Cc: Jingoo Han; linux-pci@xxxxxxxxxxxxxxx; Wangzhou (B); Yuanzhichang; > Zhudacai; zhangjukuo; qiuzhenfa; Liguozhu (Kenneth) > Subject: Re: [PATCH v2 1/3] PCI: spear13xx: fix addresses in > dw_pcie_cfg_read and dw_pcie_cfg_write > > Hi Gab, > > On Thu, Sep 10, 2015 at 8:28 PM, Gabriele Paoloni > <gabriele.paoloni@xxxxxxxxxx> wrote: > > From: gabriele paoloni <gabriele.paoloni@xxxxxxxxxx> > > > > Currently spear13xx passes the wrong "address" in many calls to > > dw_pcie_cfg_read and dw_pcie_cfg_write: the passed address is > > always pp->dbi_base, that is wrong as it does not consider > > the offset to access the right register of the PCI header. > > This patches fixes these function calls passing the address to > > access the right register. > > Thanks for the effort, however there were some more issues with > current implementation. > Like PCI_EXP_DEVCTL is only two bytes of register. Next two bytes are > PCI_EXP_DEVSTS which is RO, so writing 4 bytes at offset 'exp_cap_off > + PCI_EXP_DEVCTL' is not correct. > > I had sent a patch to correct all the issues with current > implementation [1]. You can take that as your 1st patch. Oops Sorry, I missed that patch! I'll take it as patch 1, Many Thanks Gab > > [1] https://lkml.org/lkml/2015/9/7/5 ��.n��������+%������w��{.n�����{���"�)�� jg��� �����ݢj����G���� ���j:+v���w�m������w�������h�����٥
