On Fri, 28 Aug 2015, Thomas Gleixner wrote:
On Thu, 27 Aug 2015, Keith Busch wrote:
This patch adds struct x86_msi_ops to x86's PCI sysdata. This gives a
host bridge driver the option to provide alternate MSI Data Register
and MSI-X Table Entry programming for devices in PCI domains that do
not subscribe to usual "IOAPIC" format.
I'm not too fond about more ad hoc indirection and special casing. We
should be able to handle this with hierarchical irq domains. Jiang
might have an idea how to do that for your case.
Thank you for the suggestion, I will take a closer look at this again. All
the better if we don't require an arch specific dependency.
I asked Jiang about domain hierarchies a few weeks ago and understood
these are suited for irq controllers, but the VMD device is an aggregator.
Here's a little more h/w info in case it helps steer me in the right
direction: VMD muxes all the device interrupts in its PCI domain into
one of several VMD h/w irqs. The VMD driver then has to de-mux that into
CPU side irqs for each device.
--
To unsubscribe from this list: send the line "unsubscribe linux-pci" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
