On Wed, Aug 12, 2015 at 3:03 PM, Lucas Stach <l.stach@xxxxxxxxxxxxxx> wrote:
> Set up the high part of the MSI target address in order to allow the
> MSI target to reside above the 4GB mark on 64bit and PAE systems.
>
> Signed-off-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
> ---
> drivers/pci/host/pcie-designware.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
> index 74034395cf2a..fcb798e47c30 100644
> --- a/drivers/pci/host/pcie-designware.c
> +++ b/drivers/pci/host/pcie-designware.c
> @@ -299,12 +299,15 @@ no_valid_irq:
> static void dw_msi_setup_msg(struct pcie_port *pp, unsigned int irq, u32 pos)
> {
> struct msi_msg msg;
> + u64 msi_target;
>
> if (pp->ops->get_msi_addr)
> - msg.address_lo = pp->ops->get_msi_addr(pp);
> + msi_target = pp->ops->get_msi_addr(pp);
> else
> - msg.address_lo = virt_to_phys((void *)pp->msi_data);
> - msg.address_hi = 0x0;
> + msi_target = virt_to_phys((void *)pp->msi_data);
> +
> + msg.address_lo = (u32)(msi_target & 0xffffffff);
> + msg.address_hi = (u32)(msi_target >> 32 & 0xffffffff);
>
> if (pp->ops->get_msi_data)
> msg.data = pp->ops->get_msi_data(pp, pos);
Other than above, dw_pcie_msi_init also need to be fixed
for PCIE_MSI_ADDR_HI.
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