Hi Richard, On Tue, Sep 23, 2014 at 11:54 PM, Hong-Xing.Zhu@xxxxxxxxxxxxx <Hong-Xing.Zhu@xxxxxxxxxxxxx> wrote: > [Richard] 6qdl sabreauto boards don't have the pcie reset gpio in the board design at all. I have just downloaded the mx6 sabreauto board schematics from freescale.com and it matches the one I have seen before. You can search for the CPU_PER_RST_B signal. It is connected via R785 0 ohm resistor to PCIE_RST_B. CPU_PER_RST_B can be controlled via MAX7310 pin IO/2. -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
