Hello Kishon/Viresh, > -----Original Message----- > From: Kishon Vijay Abraham I [mailto:kishon@xxxxxx] > Sent: Friday, July 11, 2014 2:03 PM > To: Viresh Kumar > Cc: Arnd Bergmann; olof@xxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; > spear-devel; Bartlomiej Zolnierkiewicz; Bjorn Helgaas; Mark Nicholson; linux- > pci@xxxxxxxxxxxxxxx; Pratyush ANAND > Subject: Re: [PATCH V9 2/7] phy: Add drivers for PCIe and SATA phy on > SPEAr13xx > > > > On Thursday 10 July 2014 07:00 PM, Viresh Kumar wrote: > > On 10 July 2014 18:47, Kishon Vijay Abraham I <kishon@xxxxxx> wrote: > >> On Thursday 10 July 2014 12:56 PM, Viresh Kumar wrote: > >>> From: Pratyush Anand <pratyush.anand@xxxxxx> > >>> [...] > >>> + > >>> +static int spear1340_miphy_sata_init(struct spear1340_miphy_priv > >>> +*priv) { > >>> + regmap_update_bits(priv->misc, SPEAR1340_PCIE_SATA_CFG, > >>> + SPEAR1340_PCIE_SATA_CFG_MASK, > >>> + SPEAR1340_SATA_CFG_VAL); > >>> + regmap_update_bits(priv->misc, SPEAR1340_PCIE_MIPHY_CFG, > >>> + SPEAR1340_PCIE_MIPHY_CFG_MASK, > >>> + > SPEAR1340_PCIE_SATA_MIPHY_CFG_SATA_25M_CRYSTAL_CLK); > >>> + /* Switch on sata power domain */ > >>> + regmap_update_bits(priv->misc, SPEAR1340_PCM_CFG, > >>> + SPEAR1340_PCM_CFG_SATA_POWER_EN, > >>> + SPEAR1340_PCM_CFG_SATA_POWER_EN); > >>> + msleep(20); > >>> + /* Disable PCIE SATA Controller reset */ > >>> + regmap_update_bits(priv->misc, SPEAR1340_PERIP1_SW_RST, > >>> + SPEAR1340_PERIP1_SW_RSATA, 0); > >>> + msleep(20); > >> > >> Please add a comment for all delays added. > > > > @Pratyush/Mohit: please let me know what to add here. > > - I think we should read regmap_*() and msleep() in continuation and so the comment above it is valid for both the operations. Otherwise we can add comment line for msleep() like: /* Wait for SATA power domain on */ /* Wait for SATA reset de-assert completion */ Similarily in *_exit routine: /* Wait for SATA power domain off */ /* Wait for SATA reset assert completion */ Thanks Mohit ��.n��������+%������w��{.n�����{���"�)�� jg��� �����ݢj����G���� ���j:+v���w�m������w�������h�����٥
