RE: [PATCH v1] PCI: enable ASPM configuration in PCIE POWERSAVE mode

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> -----Original Message-----
> From: Stephen Warren [mailto:swarren@xxxxxxxxxxxxx]
> Sent: Tuesday, July 01, 2014 8:35 PM
> To: Vidya Sagar; bhelgaas@xxxxxxxxxx; rjw@xxxxxxx;
> nagananda.chumbalkar@xxxxxx; thierry.reding@xxxxxxxxx; Stephen
> Warren; Krishna Thota; linux-pci@xxxxxxxxxxxxxxx
> Cc: linux-kernel@xxxxxxxxxxxxxxx
> Subject: Re: [PATCH v1] PCI: enable ASPM configuration in PCIE POWERSAVE
> mode
> 
> On 07/01/2014 01:16 AM, Vidya Sagar wrote:
> > commit 1a680b7c moved pcie_aspm_powersave_config_link() out of
> > pci_raw_set_power_state() to pci_set_power_state() which would enable
> > ASPM. But, with commit db288c9c, which re-introduced the following
> > check
> > ./drivers/pci/pci.c: pci_set_power_state()
> > +   /* Check if we're already there */
> > +   if (dev->current_state == state)
> > +       return 0;
> > in pci_set_power_state(), call to pcie_aspm_powersave_config_link() is
> > never made leaving ASPM broken.
> > Fix it by not returning from when the above condition is true, rather,
> > jump to ASPM configuration code and exit from there eventually.
> 
> Out of curiosity, was this patch tested by running an umodified mainline
> kernel on a Tegra device, or is this simply a port from our downstream kernel,
> without any additional upstream testing?

I've tested port of this patch on downstream kernel and it works.
I've also tested this on thierry's code base (git://gitorious.org/thierryreding/linux.git) which has
upstream code for T124-Jetson-tk1.
Because of the L0s and L1 exit latencies exhibited by jetson-tk1 on-board Realtek Ethernet controller,
subsystem can't enable ASPM states on the end point,
 but as such I've verified the flow with the help of debug prints and they indicate that the patch is doing its job correctly.

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