On Thu, Feb 20, 2014 at 09:29:14PM +0100, Thomas Petazzoni wrote: > In practice, the story is a little bit more subtle than that: the PCIe > driver may want to decide to either tell the PCI core to enlarge the > window BAR up to the next power of two size, or to dedicate two windows > to it. That is a smart, easy solution! Maybe that is the least invasive way to proceed for now? I have no idea how you decide when to round up and when to allocate more windows, that feels like a fairly complex optimization problem! Alternatively, I suspect you can use the PCI quirk mechanism to alter the resource sizing on a bridge? > Jason, would you mind maybe replying to Bjorn Helgaas email (Thu, 20 > Feb 2014 12:18:42 -0700) ? I believe that a lot of the misunderstanding > between Bjorn and me is due to the fact that I don't use the correct > PCI terminology to describe how the Marvell hardware works, and how the > Marvell PCIe driver copes with it. I'm sure you would explain it in a > way that would be more easily understood by someone very familiar with > the PCI terminology such as Bjorn. Thanks a lot! Done! Hope it helps, Jason -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
