On Thu, Jan 16, 2014 at 12:10 PM, Alex Williamson
<alex.williamson@xxxxxxxxxx> wrote:
> On Thu, 2014-01-16 at 11:49 -0700, Bjorn Helgaas wrote:
>> In the general case, we don't know what the device *is* after a reset
>> because it could have loaded new firmware. It could require more
>> resources or even a different driver.
>>
>> I know it would cause Alex heartburn to make reset look like hotplug.
>
> Yes it would. I agree that it's theoretically possible for a device to
> undergo a metamorphosis to something new at reset, but in practice it
> just doesn't happen.
Maybe not in your world, but this definitely happens, and it
definitely causes hassles for people. Some resort to hacks like
rebooting the whole system because we don't support this well.
I mentioned these before, so you may have seen them already:
http://forums.xilinx.com/t5/PCI-Express/PC-is-hung-if-run-the-second-program-FPGA-by-JTAG/td-p/20871
http://www.alteraforum.com/forum/archive/index.php/t-28477.html
http://www.alteraforum.com/forum/showthread.php?t=35091
https://github.com/NetFPGA/NetFPGA-public/wiki/Restore-PCIE-Configuration
http://lkml.indiana.edu/hypermail/linux/kernel/1104.3/02544.html
My fear is that we're building a lot of stuff based on assumptions
about how things typically operate. That works most of the time, but
it does fail on important corner cases that are spec-compliant but
atypical. From the PCI subsystem point of view, that makes me uneasy.
Bjorn
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