Resource assignment code does not work properly after we expose 64-bit prefetchable MMIO window in PowerNV platform. # ROM BAR get 4G-above address. This is because default value of PCIBIOS_MAX_MEM_32 is -1 which makes it useless in 64-bit platform. After fixing this ... # ROM BAR can't get any address. This is because PCIBIOS_MAX_MEM_32 is actually a PCI address but functions as a CPU address. After fixing this ... # 64-bit prefetchable address is never used. This is because root bridge's IORESOURCE_MEM_64 is reset due to ROM BARs, which makes it not quilify to get 4G-above prefetchable address from host bridge. The 64-bit 4G-above prefetchable window is not used at all in the end. Nothing is really broken currently. This is just a RFC series, preparing for later PowerNV 64-bit MMIO work. Guo Chao (3): PCI: do not compare CPU address with PCI address PCI: set proper default value of PCIBIOS_MAX_MEM_32 PCI: do not reset bridge's IORESOURCE_MEM_64 flag for ROM BAR arch/x86/include/asm/pci.h | 1 - drivers/pci/bus.c | 65 ++++++++++++++++++++++++++++++++++++++++++++-- drivers/pci/setup-bus.c | 3 ++- include/linux/pci.h | 2 +- 4 files changed, 66 insertions(+), 5 deletions(-) -- 1.8.3.2 -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
