Re: [PATCH] Intel pci device quirk remove D3 delay

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On Wed, Sep 25, 2013 at 4:17 PM, Arjan van de Ven <arjan@xxxxxxxxxxxxxxx> wrote:
> On 9/25/2013 2:48 PM, Bjorn Helgaas wrote:
>>
>> On Tue, Sep 24, 2013 at 5:19 PM, Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
>> wrote:
>>>
>>> On Tue, Sep 10, 2013 at 04:10:43PM -0700, Todd E Brandt wrote:
>>>>
>>>> The latest Ivy Bridge Intel chipsets have a hardware optimization which
>>>
>>>
>>> You said "Ivy Bridge" above but use "Haswell" below.  Let me know if
>>> anything needs to be corrected here.
>>
>>
>> Reading this again, the text really doesn't make sense as-is.  So
>> please confirm what this should say.
>>
>> It sure looks like it should say "The latest *Haswell* Intel chipsets ..."
>>
>> If you really mean "Ivy Bridge," then you should say something about
>> how Haswell is related to Ivy Bridge.  No doubt this is all obvious to
>> Intel folks, but it's not to me :)
>
>
> it should read "Haswell".

Fixed, thanks!

Bjorn
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