On Wednesday 06 February 2013, Thomas Petazzoni wrote: > Can't we simply agree on having a first implementation that does the > simple thing, like the existing PCIe implementation for earlier Marvell > SoC families, and improve that if it happens to be needed, depending on > user feedback? Makes sense. I just looked up the kirkwood source to verify that the window is set up to map PCI IO address 0x10000-0x1ffff for the second bus to KIRKWOOD_PCIE1_IO_PHYS_BASE, which is mapped to logical port number 0x10000-0x1ffff (identity mapping). Arnd -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
