[+to Matt, author of e49ad667815d] On Wed, Mar 05, 2025 at 06:50:18PM +0530, Siddharth Vadapalli wrote: > Commit under Fixes assigned the value of 'linkdown_irq_regfield' for the > J784S4 SoC as 'LINK_DOWN' which corresponds to BIT(1). However, according > to the Technical Reference Manual and Register Documentation for the J784S4 > SoC [0], BIT(1) corresponds to "ENABLE_SYS_EN_PCIE_DPA_1" which is __NOT__ > the field for the link-state interrupt. Instead, it is BIT(10) of the > "PCIE_INTD_ENABLE_REG_SYS_2" register that corresponds to the link-state > field named as "ENABLE_SYS_EN_PCIE_LINK_STATE". I guess the reason we want this is that on J784S4, we ignore actual link-down interrupts (and we don't write STATUS_CLR_REG_SYS_2 to clear the interrupt indication, so maybe there's an interrupt storm), and we think some other interrupt (DPA_1, whatever that is) is actually a link-down interrupt? > Hence, set 'linkdown_irq_regfield' to the macro 'J7200_LINK_DOWN' which > expands to BIT(10) and was first defined for the J7200 SoC. Other SoCs > already reuse this macro since it accurately represents the link-state > field in their respective "PCIE_INTD_ENABLE_REG_SYS_2" register. > > [0]: https://www.ti.com/lit/zip/spruj52 Thanks for the spec URL. Can you include a relevant section number? I searched for some of this stuff but couldn't find it. Since I have low confidence that the URL will be valid after a few years, I wish the spec also had a human-readable name and revision number. But maybe the alphabet soup or "SPRUJ52D", "revised July 2024" is all we can hope for. > Fixes: e49ad667815d ("PCI: j721e: Add TI J784S4 PCIe configuration") > Cc: stable@xxxxxxxxxxxxxxx > Signed-off-by: Siddharth Vadapalli <s-vadapalli@xxxxxx> > --- > > Hello, > > This patch is based on commit > 48a5eed9ad58 Merge tag 'devicetree-fixes-for-6.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux > of the master branch of Linux. > > Patch has been tested on J784S4-EVM, validating that disconnecting an > Endpoint Device connected to J784S4-EVM results in the following message > on the J784S4-EVM: > j721e-pcie 2900000.pcie: LINK DOWN! > which wasn't seen earlier. > > Regards, > Siddharth. > > drivers/pci/controller/cadence/pci-j721e.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c > index 0341d51d6aed..1da9d9918d0d 100644 > --- a/drivers/pci/controller/cadence/pci-j721e.c > +++ b/drivers/pci/controller/cadence/pci-j721e.c > @@ -376,13 +376,13 @@ static const struct j721e_pcie_data j784s4_pcie_rc_data = { > .mode = PCI_MODE_RC, > .quirk_retrain_flag = true, > .byte_access_allowed = false, > - .linkdown_irq_regfield = LINK_DOWN, > + .linkdown_irq_regfield = J7200_LINK_DOWN, > .max_lanes = 4, > }; > > static const struct j721e_pcie_data j784s4_pcie_ep_data = { > .mode = PCI_MODE_EP, > - .linkdown_irq_regfield = LINK_DOWN, > + .linkdown_irq_regfield = J7200_LINK_DOWN, > .max_lanes = 4, > }; > > -- > 2.34.1 >
