Ilpo Järvinen wrote: > On Tue, 10 Dec 2024, Bjorn Helgaas wrote: > > > On Thu, Dec 05, 2024 at 02:23:56PM -0800, Dan Williams wrote: > > > PCIe 6.2 Section 7.7.9 Device 3 Extended Capability Structure, > > > enumerates new link capabilities and status added for Gen 6 devices. One > > > of the link details enumerated in that register block is the "Segment > > > Captured" status in the Device Status 3 register. That status is > > > relevant for enabling IDE (Integrity & Data Encryption) whereby > > > Selective IDE streams can be limited to a given requester id range > > > within a given segment. > > > > s/requester id/Requester ID/ to match spec usage > > > > > +++ b/include/uapi/linux/pci_regs.h > > > @@ -749,6 +749,7 @@ > > > #define PCI_EXT_CAP_ID_NPEM 0x29 /* Native PCIe Enclosure Management */ > > > #define PCI_EXT_CAP_ID_PL_32GT 0x2A /* Physical Layer 32.0 GT/s */ > > > #define PCI_EXT_CAP_ID_DOE 0x2E /* Data Object Exchange */ > > > +#define PCI_EXT_CAP_ID_DEV3 0x2F /* Device 3 Capability/Control/Status */ > > > > It doesn't look like lspci knows about this; is there something in > > progress to add that? > > > > https://git.kernel.org/pub/scm/utils/pciutils/pciutils.git/tree/lib/header.h?id=v3.13.0#n257 > > Hi, > > I've two patches lying around that add a few Flit mode related fields > and Dev3 into lspci, although the latter patch doesn't exactly have all > the fields from Dev3 but at least it would be a good start for many > things. > > I think I'll just post them as is and see where it goes. Oh, good to hear (the dangers of replying to patch feedback in response order unfortunately means I missed this in my earlier reply). Please copy me on those patches so I can keep track of that discussion.
