Aneesh Kumar K.V <aneesh.kumar@xxxxxxxxxx> writes:
> Hi Dan,
>
> Dan Williams <dan.j.williams@xxxxxxxxx> writes:
>> +int pci_ide_stream_setup(struct pci_dev *pdev, struct pci_ide *ide,
>> + enum pci_ide_flags flags)
>> +{
>> + struct pci_host_bridge *hb = pci_find_host_bridge(pdev->bus);
>> + struct pci_dev *rp = pcie_find_root_port(pdev);
>> + int mem = 0, rc;
>> +
>> + if (ide->stream_id < 0 || ide->stream_id > U8_MAX) {
>> + pci_err(pdev, "Setup fail: Invalid stream id: %d\n", ide->stream_id);
>> + return -ENXIO;
>> + }
>> +
>> + if (test_and_set_bit_lock(ide->stream_id, hb->ide_stream_ids)) {
>> + pci_err(pdev, "Setup fail: Busy stream id: %d\n",
>> + ide->stream_id);
>> + return -EBUSY;
>> + }
>> +
>
> Considering we are using the hostbridge ide_stream_ids bitmap, why is
> the stream_id allocation not generic? ie, any reason why a stream id alloc
> like below will not work?
>
> static int pcie_ide_sel_streamid_alloc(struct pci_dev *pdev)
> {
> int stream_id;
> struct pci_host_bridge *hb;
>
> hb = pci_find_host_bridge(pdev->bus);
>
> stream_id = find_first_zero_bit(hb->ide_stream_ids, hb->nr_ide_streams);
> if (stream_id >= hb->nr_ide_streams)
> return -EBUSY;
>
> return stream_id;
> }
>
Also wondering should the stream id be unique at the rootport level? ie
for a config like below
# pwd
/sys/devices/platform/40000000.pci/pci0000:00
# ls
0000:00:01.0 available_secure_streams power
0000:00:02.0 pci_bus uevent
# lspci
00:01.0 PCI bridge: ARM Device 0def
00:02.0 PCI bridge: ARM Device 0def
01:00.0 Unassigned class [ff00]: ARM Device ff80
02:00.0 SATA controller: Device 0abc:aced (rev 01)
#
# lspci -t
-[0000:00]-+-01.0-[01]----00.0
\-02.0-[02]----00.0
#
I should be able to use the same stream id to program both the rootports?
-aneesh
