On Tue, Nov 26, 2024 at 11:22:49AM +0100, Neil Armstrong wrote: > Qcom PCIe RC controllers are capable of generating 'global' SPI interrupt > to the host CPU. This interrupt can be used by the device driver to handle > PCIe link specific events such as Link up and Link down, which give the > driver a chance to start bus enumeration on its own when link is up and > initiate link training if link goes to a bad state. The PCIe driver can > still work without this interrupt but it will provide a nice user > experience when device gets plugged and removed. > > Document the interrupt as optional for SM8550 and SM8650 platforms. > > Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx> > --- > Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof