On Mon, Nov 18, 2024 at 09:04:55AM +0100, Lorenzo Bianconi wrote:
> In order to make the code more readable, the reset_control_bulk_assert()
> for PHY reset lines is moved to make it pair with
> reset_control_bulk_deassert() in mtk_pcie_power_up() and
> mtk_pcie_en7581_power_up(). The same change is done for
> reset_control_assert() used to assert MAC reset line.
>
> Introduce PCIE_MTK_RESET_TIME_US macro for the time needed to
> complete PCIe reset on MediaTek controller.
>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
> Signed-off-by: Lorenzo Bianconi <lorenzo@xxxxxxxxxx>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
- Mani
> ---
> drivers/pci/controller/pcie-mediatek-gen3.c | 27 +++++++++++++++++++--------
> 1 file changed, 19 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c
> index 3cfcb45d31508142d28d338ff213f70de9b4e608..2b80edd4462ad4e9f2a5d192db7f99307113eb8a 100644
> --- a/drivers/pci/controller/pcie-mediatek-gen3.c
> +++ b/drivers/pci/controller/pcie-mediatek-gen3.c
> @@ -125,6 +125,8 @@
>
> #define MAX_NUM_PHY_RESETS 3
>
> +#define PCIE_MTK_RESET_TIME_US 10
> +
> /* Time in ms needed to complete PCIe reset on EN7581 SoC */
> #define PCIE_EN7581_RESET_TIME_MS 100
>
> @@ -912,6 +914,14 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie)
> int err;
> u32 val;
>
> + /*
> + * The controller may have been left out of reset by the bootloader
> + * so make sure that we get a clean start by asserting resets here.
> + */
> + reset_control_bulk_assert(pcie->soc->phy_resets.num_resets,
> + pcie->phy_resets);
> + reset_control_assert(pcie->mac_reset);
> +
> /*
> * Wait for the time needed to complete the bulk assert in
> * mtk_pcie_setup for EN7581 SoC.
> @@ -986,6 +996,15 @@ static int mtk_pcie_power_up(struct mtk_gen3_pcie *pcie)
> struct device *dev = pcie->dev;
> int err;
>
> + /*
> + * The controller may have been left out of reset by the bootloader
> + * so make sure that we get a clean start by asserting resets here.
> + */
> + reset_control_bulk_assert(pcie->soc->phy_resets.num_resets,
> + pcie->phy_resets);
> + reset_control_assert(pcie->mac_reset);
> + usleep_range(PCIE_MTK_RESET_TIME_US, 2 * PCIE_MTK_RESET_TIME_US);
> +
> /* PHY power on and enable pipe clock */
> err = reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
> if (err) {
> @@ -1070,14 +1089,6 @@ static int mtk_pcie_setup(struct mtk_gen3_pcie *pcie)
> * counter since the bulk is shared.
> */
> reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
> - /*
> - * The controller may have been left out of reset by the bootloader
> - * so make sure that we get a clean start by asserting resets here.
> - */
> - reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
> -
> - reset_control_assert(pcie->mac_reset);
> - usleep_range(10, 20);
>
> /* Don't touch the hardware registers before power up */
> err = pcie->soc->power_up(pcie);
>
> --
> 2.47.0
>
--
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