On Thu, Nov 07, 2024 at 11:13:34AM +0000, Manivannan Sadhasivam wrote: > On Thu, Nov 07, 2024 at 04:44:55PM +0800, Richard Zhu wrote: > > Before sending PME_TURN_OFF, don't test the LTSSM stat. Since it's safe > > to send PME_TURN_OFF message regardless of whether the link is up or > > down. So, there would be no need to test the LTSSM stat before sending > > PME_TURN_OFF message. > > > > What is the incentive to send PME_Turn_Off when link is not up? see Bjorn's comments in https://lore.kernel.org/imx/20241106222933.GA1543549@bhelgaas/ "But I don't think you responded to the race question. What happens here? if (dw_pcie_get_ltssm(pci) > DW_PCIE_LTSSM_DETECT_ACT) { --> link goes down here <-- pci->pp.ops->pme_turn_off(&pci->pp); You decide the LTSSM is active and the link is up. Then the link goes down. Then you send PME_Turn_off. Now what? If it's safe to try to send PME_Turn_off regardless of whether the link is up or down, there would be no need to test the LTSSM state." I think it may happen if EP device HOT remove/reset after if check. Frank > > > Remove the L2 poll too, after the PME_TURN_OFF message is sent out. > > Because the re-initialization would be done in dw_pcie_resume_noirq(). > > > > As Krishna explained, host needs to wait until the endpoint acks the message > (just to give it some time to do cleanups). Then only the host can initiate > D3Cold. It matters when the device supports L2. > > - Mani > > > Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx> > > --- > > .../pci/controller/dwc/pcie-designware-host.c | 20 ++++--------------- > > 1 file changed, 4 insertions(+), 16 deletions(-) > > > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c > > index f86347452026..64c49adf81d2 100644 > > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > > @@ -917,7 +917,6 @@ static int dw_pcie_pme_turn_off(struct dw_pcie *pci) > > int dw_pcie_suspend_noirq(struct dw_pcie *pci) > > { > > u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP); > > - u32 val; > > int ret = 0; > > > > /* > > @@ -927,23 +926,12 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci) > > if (dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKCTL) & PCI_EXP_LNKCTL_ASPM_L1) > > return 0; > > > > - /* Only send out PME_TURN_OFF when PCIE link is up */ > > - if (dw_pcie_get_ltssm(pci) > DW_PCIE_LTSSM_DETECT_ACT) { > > - if (pci->pp.ops->pme_turn_off) > > - pci->pp.ops->pme_turn_off(&pci->pp); > > - else > > - ret = dw_pcie_pme_turn_off(pci); > > - > > + if (pci->pp.ops->pme_turn_off) { > > + pci->pp.ops->pme_turn_off(&pci->pp); > > + } else { > > + ret = dw_pcie_pme_turn_off(pci); > > if (ret) > > return ret; > > - > > - ret = read_poll_timeout(dw_pcie_get_ltssm, val, val == DW_PCIE_LTSSM_L2_IDLE, > > - PCIE_PME_TO_L2_TIMEOUT_US/10, > > - PCIE_PME_TO_L2_TIMEOUT_US, false, pci); > > - if (ret) { > > - dev_err(pci->dev, "Timeout waiting for L2 entry! LTSSM: 0x%x\n", val); > > - return ret; > > - } > > } > > > > dw_pcie_stop_link(pci); > > -- > > 2.37.1 > > > > -- > மணிவண்ணன் சதாசிவம்
