On 9/10/24 08:18, Stanimir Varbanov wrote:
Add PCIe devicetree nodes, plus needed reset and mip MSI-X
controllers.
Signed-off-by: Stanimir Varbanov <svarbanov@xxxxxxx>
---
arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 166 ++++++++++++++++++++++
1 file changed, 166 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
index 6e5a984c1d4e..9dd127d4c9a2 100644
--- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
@@ -192,6 +192,12 @@ soc: soc@107c000000 {
#address-cells = <1>;
#size-cells = <1>;
+ pcie_rescal: reset-controller@119500 {
+ compatible = "brcm,bcm7216-pcie-sata-rescal";
+ reg = <0x00119500 0x10>;
+ #reset-cells = <0>;
+ };
+
sdio1: mmc@fff000 {
compatible = "brcm,bcm2712-sdhci",
"brcm,sdhci-brcmstb";
@@ -204,6 +210,12 @@ sdio1: mmc@fff000 {
mmc-ddr-3_3v;
};
+ bcm_reset: reset-controller@1504318 {
> + compatible = "brcm,brcmstb-reset";> + reg = <0x01504318 0x30>;
+ #reset-cells = <1>;
+ };
+
system_timer: timer@7c003000 {
compatible = "brcm,bcm2835-system-timer";
reg = <0x7c003000 0x1000>;
@@ -267,6 +279,160 @@ gicv2: interrupt-controller@7fff9000 {
};
};
+ axi@1000000000 {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ ranges = <0x00 0x00000000 0x10 0x00000000 0x01 0x00000000>,
+ <0x14 0x00000000 0x14 0x00000000 0x04 0x00000000>,
+ <0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>,
+ <0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>;
+
+ dma-ranges = <0x00 0x00000000 0x00 0x00000000 0x10 0x00000000>,
+ <0x14 0x00000000 0x14 0x00000000 0x04 0x00000000>,
+ <0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>,
+ <0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>;
+
+ pcie0: pcie@100000 {
+ compatible = "brcm,bcm2712-pcie";
+ reg = <0x00 0x00100000 0x00 0x9310>;
+ device_type = "pci";
+ linux,pci-domain = <0>;
+ max-link-speed = <2>;
+ bus-range = <0x00 0xff>;
+ num-lanes = <1>;
+ #address-cells = <3>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ interrupt-parent = <&gicv2>;
+ interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pcie", "msi";
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+ interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 2 &gicv2 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 3 &gicv2 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 4 &gicv2 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&bcm_reset 42>, <&pcie_rescal>;
+ reset-names = "bridge", "rescal";
+ msi-controller;
+ msi-parent = <&pcie0>;
+
+ ranges = <0x02000000 0x00 0x00000000
+ 0x17 0x00000000
+ 0x00 0xfffffffc>,
+ <0x43000000 0x04 0x00000000
+ 0x14 0x00000000
+ 0x3 0x00000000>;
Maybe a comment would help in figuring out what these ranges describe,
and we could probably do a single line cell:
+
+ dma-ranges = <0x43000000 0x10 0x00000000
Likewise
+ 0x00 0x00000000
+ 0x10 0x00000000>;
+
+ status = "disabled";
Other than that, this LGTM, assume the dt-bindings maintainer are also
OK with that.
--
Florian