Re: [PATCH 0/2] PCI: mediatek-gen3: Support limiting link speed and width

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Il 06/08/24 11:48, AngeloGioacchino Del Regno ha scritto:
This series adds support for limiting the PCI-Express link speed
(or PCIe gen restriction) and link width (number of lanes) in the
pcie-mediatek-gen3 driver.

The maximum supported pcie gen is read from the controller itself,
so defining a max gen through platform data for each SoC is avoided.

Both are done by adding support for the standard devicetree properties
`max-link-speed` and `num-lanes`.

Please note that changing the bindings is not required, as those do
already allow specifying those properties for this controller.

AngeloGioacchino Del Regno (2):
   PCI: mediatek-gen3: Add support for setting max-link-speed limit
   PCI: mediatek-gen3: Add support for restricting link width

  drivers/pci/controller/pcie-mediatek-gen3.c | 76 ++++++++++++++++++++-
  1 file changed, 74 insertions(+), 2 deletions(-)


Gentle ping for this series.

Thanks,
Angelo.




[Index of Archives]     [DMA Engine]     [Linux Coverity]     [Linux USB]     [Video for Linux]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]     [Greybus]

  Powered by Linux