On 7/20/24 14:25, David Wei wrote: > On 2024-07-17 13:55, Wei Huang wrote: >> Hi All, >> >> TPH (TLP Processing Hints) is a PCIe feature that allows endpoint devices to >> provide optimization hints for requests that target memory space. These hints, >> in a format called steering tag (ST), are provided in the requester's TLP >> headers and allow the system hardware, including the Root Complex, to >> optimize the utilization of platform resources for the requests. >> >> Upcoming AMD hardware implement a new Cache Injection feature that leverages >> TPH. Cache Injection allows PCIe endpoints to inject I/O Coherent DMA writes >> directly into an L2 within the CCX (core complex) closest to the CPU core that >> will consume it. This technology is aimed at applications requiring high >> performance and low latency, such as networking and storage applications. > > This sounds very exciting Wei and it's good to see bnxt support. When > you say 'upcoming AMD hardware' are you able to share exactly which? I > would like to try this out. I can't specify which server platforms yet. But you can find this feature in either BIOS options or decode it from ACPI DSDT table (search UUID e5c937d0-3553-4d7a-9117-ea4d19c3434d, Func 0x0F).
