Qualcomm PCIe controller has a wrapper called PARF which supports the relocation of DBI and ATU address space within the system memory. PARF gets the location of DBI and ATU from PARF_DBI_BASE_ADDR and PARF_ATU_BASE_ADDR registers. PARF also mirrors the memory block containing DBI and ATU registers within the system memory. And the size of this memory block is programmed in PARF_SLV_ADDR_SPACE_SIZE register. Power on reset of values of the above mentioned registers are good enough on platforms which require smaller size (less than 16MB) BAR memory. For platforms that need bigger BAR memory size, this mirroring of DBI and ATU address space by PARF conflicts with BAR memory. So to allow usage of bigger size of BAR, it is required to program PARF registers to prevent mirroring of DBI and ATU blocks and provide the physical addresses of DBI and ATU to PARF. This patch series stores physical addresses of DBI and ATU address space in 'struct dw_pcie' and programs the required PARF registers in the pcie_qcom.c driver. Changes in v2: - Updated commit message as suggested by Bjorn Helgaas. - Updated function name from qcom_pcie_avoid_dbi_atu_mirroring() to qcom_pcie_configure_dbi_atu_base() as suggested by Bjorn Helgaas. - Removed check for pdev in qcom_pcie_configure_dbi_atu_base() as suggested by Bjorn Helgaas. - Moved the qcom_pcie_configure_dbi_atu_base() call in the qcom_pcie_init_2_7_0() to the same place where PARF_DBI_BASE_ADDR register is being programmed as suggested by Bjorn Helgaas. - Added 'dbi_phys_addr', 'atu_phys_addr' in the 'struct dw_pcie' to store the physical addresses of dbi, atu base registers in dw_pcie_get_resources() as suggested by Manivannan Sadhasivam. - Added separate functions qcom_pcie_configure_dbi_atu_base() and qcom_pcie_configure_dbi_base() to program PARF register of different PARF versions. This is to disable DBI mirroring in all Qualcomm PCIe controllers as suggested by Manivannan Sadhasivam. - Link to v1: https://lore.kernel.org/linux-pci/a01404d2-2f4d-4fb8-af9d-3db66d39acf7@xxxxxxxxxxx/T/ Tested: - Validated NVME functionality with PCIe6a on x1e80100 platform. - Validated WiFi functionality with PCIe4 on x1e80100 platform. Prudhvi Yarlagadda (2): PCI: dwc: Add dbi_phys_addr and atu_phys_addr to struct dw_pcie PCI: qcom: Avoid DBI and ATU register space mirror to BAR/MMIO region drivers/pci/controller/dwc/pcie-designware.c | 2 + drivers/pci/controller/dwc/pcie-designware.h | 2 + drivers/pci/controller/dwc/pcie-qcom.c | 62 ++++++++++++++------ 3 files changed, 49 insertions(+), 17 deletions(-) -- 2.25.1
