On 7/11/24 01:16, Jim Quinlan wrote: > Our HW design has again changed a register offset which used to be standard > for all Broadcom SOCs with PCIe cores. This difference is now reconciled > for the registers HARD_DEBUG and INTR2_CPU_BASE. > > Signed-off-by: Jim Quinlan <james.quinlan@xxxxxxxxxxxx> > --- > drivers/pci/controller/pcie-brcmstb.c | 39 ++++++++++++++++----------- > 1 file changed, 24 insertions(+), 15 deletions(-) > Reviewed-by: Stanimir Varbanov <svarbanov@xxxxxxx> ~Stan
