The ranges description states that "at least one non-prefetchable memory
and one or both of prefetchable memory and IO space may also be provided."
However, it should not limit the maximum number of ranges to 3.
Freescale LS1028 and iMX95 use more than 3 ranges because the space splits
some discontinuous prefetchable and non-prefetchable segments.
Drop minItems and maxItems. The number of entries will be limited to 32
in pci-bus-common.yaml in dtschema, which should be sufficient.
Fix the below CHECK_DTBS warning.
arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb: pcie@1f0000000: ranges: [[2181038080, 1, 4160749568, 1, 4160749568, 0, 1441792], [3254779904, 1, 4162191360, 1, 4162191360, 0, 458752], [2181038080, 1, 4162650112, 1, 4162650112, 0, 131072], [3254779904, 1, 4162781184, 1, 4162781184, 0, 131072], [2181038080, 1, 4162912256, 1, 4162912256, 0, 131072], [3254779904, 1, 4163043328, 1, 4163043328, 0, 131072], [2181038080, 1, 4227858432, 1, 4227858432, 0, 4194304]] is too long
Signed-off-by: Frank Li <Frank.Li@xxxxxxx>
---
Change from v1 to v2
- Rework commit message
- drop minItems and maxItems according to Rob's comments.
---
Documentation/devicetree/bindings/pci/host-generic-pci.yaml | 2 --
1 file changed, 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
index 3484e0b4b412e..3be1fff411f8d 100644
--- a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
+++ b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
@@ -102,8 +102,6 @@ properties:
As described in IEEE Std 1275-1994, but must provide at least a
definition of non-prefetchable memory. One or both of prefetchable Memory
and IO Space may also be provided.
- minItems: 1
- maxItems: 3
dma-coherent: true
iommu-map: true
--
2.34.1
