Re: [PATCH v2 2/3] PCI: Create new reset method to force SBR for CXL

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]


Vishal Aslot wrote:
> Hi,
> For T2 and T3 persistent memory devices, wouldn’t we also need a way
> to trigger device cache flush and then disable out of
> cxl_reest_bus_function()?
> CXL Spec 3.1 (Aug ’23), Section 9.3 which refers to system reset flow
> has RESETPREP VDMs to trigger device cache flush, put memory in safe
> state, etc. These devices would benefit from this in case of SBR as
> well, but it is root port specific so may be an ACPI method could be
> involved out of cxl_reset_bus_function()?

In short, no, OS initiated device-cache-flush is not indicated, nor
possible (GPF has no mechanism for system-software trigger) for this

Specifically that section states:

" is expected that the CXL devices are already in an Inactive State
with their contexts flushed to the system memory or CXL-attached memory
before the platform reset flow is triggered" if reset is triggered while the device is mapped and active then
the administrator gets to keep all the pieces. This SBR enabling is all
about making sure the kernel log reflects when the administrator messed
up and triggered reset while the device had active decoders.

[Index of Archives]     [DMA Engine]     [Linux Coverity]     [Linux USB]     [Video for Linux]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]     [Greybus]

  Powered by Linux