On Tue, Mar 19, 2024, at 17:53, Niklas Cassel wrote: > On Tue, Mar 19, 2024 at 10:18:26PM +0530, Manivannan Sadhasivam wrote: >> > >> > I did also see this comment: >> > https://github.com/torvalds/linux/blob/master/Documentation/memory-barriers.txt#L2785-L2790 >> > >> > Do you think that we need to perform any flushing after the memset(), >> > to ensure that the data written using memcpy_toio() is actually what >> > we expect it to me? >> > >> >> The documentation recommends cache flushing only if the normal memory write and >> MMIO access are dependent. But here you are just accessing the MMIO. So no >> explicit ordering or cache flushing is required. > > What does dependent mean in this case then? > > Since the data that we are writing to the device is the data that was > just written to memory using memset(). You need a barrier for the case where the memset() writes to a buffer in RAM and then you write the address of that buffer into a device register, which triggers a DMA read from the buffer. Without a barrier, the side effect of the MMIO write may come before the data in the RAM buffer is visible. A memcpy_fromio() only involves a single master accessing the memory (i.e. the CPU executing both the memset() and the memcpy()), so there is no way this can go wrong. Arnd
