On Tue, Mar 19, 2024, at 05:31, Manivannan Sadhasivam wrote:
> On Mon, Mar 18, 2024 at 09:02:21PM +0100, Arnd Bergmann wrote:
>> On Mon, Mar 18, 2024, at 20:30, Niklas Cassel wrote:
>> > diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c
>> > index 705029ad8eb5..cb6c9ccf3a5f 100644
>> > --- a/drivers/misc/pci_endpoint_test.c
>> > +++ b/drivers/misc/pci_endpoint_test.c
>> > @@ -272,31 +272,59 @@ static const u32 bar_test_pattern[] = {
>> > 0xA5A5A5A5,
>> > };
>> >
>> > +static int pci_endpoint_test_bar_memcmp(struct pci_endpoint_test *test,
>> > + enum pci_barno barno, int offset,
>> > + void *write_buf, void *read_buf,
>> > + int size)
>> > +{
>> > + memset(write_buf, bar_test_pattern[barno], size);
>> > + memcpy_toio(test->bar[barno] + offset, write_buf, size);
>> > +
>> > + /* Make sure that reads are performed after writes. */
>> > + mb();
>> > + memcpy_fromio(read_buf, test->bar[barno] + offset, size);
>>
>> Did you see actual bugs without the barrier? On normal PCI
>> semantics, a read will always force a write to be flushed first.
>>
>
> Even for non-PCI cases, read/writes to the same region are not reordered, right?
Correct. The only thing that is special about PCI here is
that writes are explicitly allowed to get posted in the
first place, on other buses the memcpy_toio() by itself
might already require non-posted behavior.
Arnd
