On Wed, Mar 06, 2024 at 10:56:46AM +0100, Johan Hovold wrote: > This series addresses a few problems with the sc8280xp PCIe > implementation. > Qualcomm has now confirmed that this is an issue on sc8280xp and its > derivate platforms. Specifically, the PHY configuration used on these > platforms is not correctly tuned for L0s and there is currently no > updated configuration available. > > As we are now at 6.8-rc7, I've rebased this series on the Qualcomm PCIe > binding rework in linux-next so that the whole series can be merged for > 6.9 (the patch to disable l0s and the devicetree fix are both marked for > stable backport anyway). > > The DT bindings and PCI patch are expected to go through the PCI tree, > while Bjorn A takes the devicetree updates through the Qualcomm tree. > Johan Hovold (5): > dt-bindings: PCI: qcom: Allow 'required-opps' > dt-bindings: PCI: qcom: Do not require 'msi-map-mask' > PCI: qcom: Disable ASPM L0s for sc8280xp, sa8540p and sa8295p Bjorn H, could you pick up these three for 6.9-rc1? > arm64: dts: qcom: sc8280xp: add missing PCIe minimum OPP > arm64: dts: qcom: sc8280xp: enable GICv3 ITS for PCIe That way there's a small chance that Bjorn A can be able to squeeze in the patch to enable ITS in 6.9 too (e.g. if there's an rc8). Johan
