This series addresses a few problems with the sc8280xp PCIe implementation. The DWC PCIe controller can either use its internal MSI controller or an external one such as the GICv3 ITS. Enabling the latter allows for assigning affinity to individual interrupts, but results in a large amount of Correctable Errors being logged on both the Lenovo ThinkPad X13s and the sc8280xp-crd reference design. It turns out that these errors are always generated, but for some yet to be determined reason, the AER interrupts are never received when using the internal MSI controller, which makes the link errors harder to notice. On the X13s, there is a large number of errors generated when bringing up the link on boot. This is related to the fact that UEFI firmware has already enabled the Wi-Fi PCIe link at Gen2 speed and restarting the link at Gen3 generates a massive amount of errors until the Wi-Fi firmware is restarted. This has now also been shown to cause the Wi-Fi to sometimes not start at all on boot for some users. A recent commit enabling ASPM on certain Qualcomm platforms introduced further errors when using the Wi-Fi on the X13s as well as when accessing the NVMe on the CRD. The exact reason for this has not yet been identified, but disabling ASPM L0s makes the errors go away. This could suggest that either the current ASPM implementation is incomplete or that L0s is not supported with these devices. Note that the X13s and CRD use the same Wi-Fi controller, but the errors are only generated on the X13s. The NVMe controller on my X13s does not support L0s so there are no issues there, unlike on the CRD which uses a different controller. The modem on the CRD does not generate any errors, but both the NVMe and modem keeps bouncing in and out of L0s/L1 also when not used, which could indicate that there are bigger problems with the ASPM implementation. I don't have a modem on my X13s so I have not been able to test whether L0s causes any trouble there. Note that disabling ASPM L0s for the X13s Wi-Fi does not seem to have a significant impact on the power consumption (and there are indications that this applies generally for L0s on these platforms). *** Qualcomm has now confirmed that this is an issue on sc8280xp and its derivate platforms. Specifically, the PHY configuration used on these platforms is not correctly tuned for L0s and there is currently no updated configuration available. As we are now at 6.8-rc7, I've rebased this series on the Qualcomm PCIe binding rework in linux-next so that the whole series can be merged for 6.9 (the patch to disable l0s and the devicetree fix are both marked for stable backport anyway). The DT bindings and PCI patch are expected to go through the PCI tree, while Bjorn A takes the devicetree updates through the Qualcomm tree. Johan Changes in v4 - drop the 'aspm-no-l0s' DT property and disable L0s for all sc8280xp derivative platforms based on the compatible string for now Changes in v3 - drop the two wifi link speed patches which have been picked up for 6.8 - rebase on binding rework in linux-next and add the properties also to the new qcom,pcie-common.yaml - https://lore.kernel.org/linux-pci/20240126-dt-bindings-pci-qcom-split-v3-0-f23cda4d74c0@xxxxxxxxxx/ - fix an 'L0s' typo in one commit message Changes in v2 - drop RFC from ASPM patches and add stable tags - reorder patches and move ITS patch last - fix s/GB/MB/ typo in Gen2 speed commit messages - fix an incorrect Fixes tag - amend commit message X13 wifi link speed patch after user confirmation that this fixes the wifi startup issue - disable L0s also for modem and wifi on CRD - disable L0s also for nvme and modem on X13s Johan Hovold (5): dt-bindings: PCI: qcom: Allow 'required-opps' dt-bindings: PCI: qcom: Do not require 'msi-map-mask' PCI: qcom: Disable ASPM L0s for sc8280xp, sa8540p and sa8295p arm64: dts: qcom: sc8280xp: add missing PCIe minimum OPP arm64: dts: qcom: sc8280xp: enable GICv3 ITS for PCIe .../bindings/pci/qcom,pcie-common.yaml | 4 ++- .../devicetree/bindings/pci/qcom,pcie.yaml | 4 ++- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 17 +++++++++- drivers/pci/controller/dwc/pcie-qcom.c | 31 +++++++++++++++++-- 4 files changed, 51 insertions(+), 5 deletions(-) -- 2.43.0
