On Mon, Nov 20, 2023 at 11:48:25AM +0100, Krzysztof Kozlowski wrote: > On 20/11/2023 11:11, Dmitry Baryshkov wrote: > >> + then: > >> + oneOf: > >> + - properties: > >> + clocks: > >> + minItems: 7 > >> + maxItems: 7 > >> + clock-names: > >> + items: > >> + - const: pipe # PIPE clock > >> + - const: aux # Auxiliary clock > >> + - const: cfg # Configuration clock > >> + - const: bus_master # Master AXI clock > >> + - const: bus_slave # Slave AXI clock > >> + - const: slave_q2a # Slave Q2A clock > > > > Mani promised to check whether we should use the 'ref' clock for the > > PCIe hosts or not. > > I'd ask to delay this patch until we finish that investigation. > > Right. I thought that his Rb-tag solves it, but if not - let's wait. > We discussed mostly offline, after I gave my R-b tag. I checked with Qcom on the use of "ref" clock in both PCIe and PHY nodes. It turned out that both nodes indeed need the "ref" clock, but not the GCC.*CLKREF that comes out of GCC. GCC.*CLKREF is only needed by the PHY node since PHY uses it for it's internal logic. For PCIe node, RPMH_CXO_CLK should be used as "ref" clock since it is used by the PCIe IP internally. This behavior applies to other peripherals like UFS, USB as well with same inconsistency in DT. So we need to fix this for those peripherals also. I can take up PCIe and UFS, and someone needs to fix USB. And for this patch, "ref" clock needs to be added to SM8150. Thanks Dmitry for pointing this out mess! - Mani > Best regards, > Krzysztof > -- மணிவண்ணன் சதாசிவம்
