This series adds the relavent DT bindings, new compatible string, add support to EPF driver and add EP PCIe node in dtsi file for ep pcie0 controller. v5 -> v6: - update cover letter. v4 -> v5: - add maxItems to the respective field to constrain io space and interrupt in all variants. v3 -> v4: - add maxItems field in dt bindings - update comment in patch2 - dropped PHY driver patch as it is already applied [1] - update comment in EPF driver patch - update commect in dtsi and add iommus instead of iommu-map [1] https://lore.kernel.org/all/169804254205.383714.18423881810869732517.b4-ty@xxxxxxxxxx/ v2 -> v3: - removed if/then schemas, added minItems for reg, reg-bnames, interrupt and interrupt-names instead. - adding qcom,sa8775p-pcie-ep compitable for sa8775p as we have some specific change to add. - reusing sm8450's pcs_misc num table as it is same as sa8775p. used appropriate namespace for pcs. - remove const from sa8775p_header as kernel test robot throwing some warnings due to this. - remove fallback compatiable as we are adding compatiable for sa8775p. v1 -> v2: - update description for dma - Reusing qcom,sdx55-pcie-ep compatibe so remove compaitable for sa8775p - sort the defines in phy header file and remove extra defines - add const in return type pci_epf_header and remove MHI_EPF_USE_DMA flag as hdma patch is not ready - add fallback compatiable as qcom,sdx55-pcie-ep, add iommu property Mrinmay Sarkar (4): dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC PCI: qcom-ep: Add support for SA8775P SOC PCI: epf-mhi: Add support for SA8775P arm64: dts: qcom: sa8775p: Add ep pcie0 controller node .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 64 +++++++++++++++++++++- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 46 ++++++++++++++++ drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + drivers/pci/endpoint/functions/pci-epf-mhi.c | 17 ++++++ 4 files changed, 126 insertions(+), 2 deletions(-) -- 2.7.4