On Wed, Jul 12, 2023 at 07:23:11AM +0000, Yong-Xuan Wang wrote: > The fu740 PCIe has 256 msix vectors. We need to specify it in driver code > to enable more msix vectors. AFAIR DW PCIe RP doesn't support MSI-X. It's just MSI implemented in the framework of iMSI-RX engine. There can be up to eight MSI_CTRL_INT_i_* registers enabled each of which is equipped with 32 doorbells. The control register and the doorbell flag IDs are encoded by the MSI data: [7:5] - MSI_CTRL_INT_* register, [4:0] - doorbell. So when an MSI MWr TLP arrives DW PCIe RP controller detects it by the target address, then parses its data and raises the IRQ with the respective doorbell set. Such TLPs is never transferred further to the system then. So I'd fix the commit message respectively. Other than that the change looks good. Reviewed-by: Serge Semin <fancer.lancer@xxxxxxxxx> -Serge(y) > > Signed-off-by: Yong-Xuan Wang <yongxuan.wang@xxxxxxxxxx> > --- > drivers/pci/controller/dwc/pcie-fu740.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/pci/controller/dwc/pcie-fu740.c b/drivers/pci/controller/dwc/pcie-fu740.c > index 0c90583c078b..1e9b44b8bba4 100644 > --- a/drivers/pci/controller/dwc/pcie-fu740.c > +++ b/drivers/pci/controller/dwc/pcie-fu740.c > @@ -299,6 +299,7 @@ static int fu740_pcie_probe(struct platform_device *pdev) > pci->dev = dev; > pci->ops = &dw_pcie_ops; > pci->pp.ops = &fu740_pcie_host_ops; > + pci->pp.num_vectors = MAX_MSI_IRQS; > > /* SiFive specific region: mgmt */ > afp->mgmt_base = devm_platform_ioremap_resource_byname(pdev, "mgmt"); > -- > 2.17.1 >
