On Tue, Mar 6, 2012 at 7:49 PM, Bjorn Helgaas <bjorn.helgaas@xxxxxxxxx> wrote: >> my sandbridge system has cpu bus 0x7f, and 0xff in DSDT. >> >> but nehalem and westmere system does not have cpu bus 0xf8, ... 0xff. > > I think you're saying that on some machines, the BIOS decided not to > expose host bridges leading to CPU devices, and you want to discover > those devices anyway. (What's the reason you want to discover them?) current code for mmconf will set pcibios_last_bios according to mmconf bus range. so it legacy peer root bus fix up will discover those cpu buses. then if some one remove them through echo 1 > /sys/devices/pci0000:ff/pci_bus/0000:ff/remove then echo 1 > /sys/bus/pci/rescan_root will not recover those cpu buses without this patch. Yinghai -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
