On Tue, Mar 6, 2012 at 3:13 PM, Bjorn Helgaas <bhelgaas@xxxxxxxxxx> wrote:
> On Tue, Mar 6, 2012 at 12:14 AM, Yinghai Lu <yinghai@xxxxxxxxxx> wrote:
>> need use it to rescan root bus that was not added via acpi probe.
>>
>> Signed-off-by: Yinghai Lu <yinghai@xxxxxxxxxx>
>> ---
>> arch/x86/pci/legacy.c | 25 +++++++++++++++++++++++++
>> 1 files changed, 25 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/x86/pci/legacy.c b/arch/x86/pci/legacy.c
>> index aab0e41..7a7c78f 100644
>> --- a/arch/x86/pci/legacy.c
>> +++ b/arch/x86/pci/legacy.c
>> @@ -79,3 +79,28 @@ int __init pci_subsys_init(void)
>> return 0;
>> }
>> subsys_initcall(pci_subsys_init);
>> +
>> +void __devinit pcibios_root_rescan(void)
>> +{
>> + int busn;
>> + struct pci_bus *bus;
>> +
>> + if (pcibios_last_bus <= 0 || pcibios_last_bus > 0xff)
>> + return;
>> +
>> + for (busn = 0; busn <= pcibios_last_bus; busn++) {
>> + bus = pci_find_bus(0, busn);
>> +
>> + if (bus)
>> + continue;
>> +
>> + bus = __pcibios_scan_specific_bus(busn, false);
>> +
>> + if (!bus)
>> + continue;
>> +
>> + pci_assign_unassigned_bus_resources(bus);
>> +
>> + pci_bus_add_devices(bus);
>> + }
>> +}
>
> Does anybody call this?
yes, in
[PATCH 19/23] PCI: add /sys/bus/pci/rescan_root
>
> Do we need it? I assume we only care about host bridge hotplug via ACPI on x86.
my sandbridge system has cpu bus 0x7f, and 0xff in DSDT.
but nehalem and westmere system does not have cpu bus 0xf8, ... 0xff.
>
> Please wait a while (at least a day or two) before reposting your
> series so people have time to take a look at the current one. It's a
> real nuisance to be working through a large series like this and get
> bombed with a repost of the whole thing that tweaks some minor detail.
> I'd rather take some time and get as much of the discussion out of
> the way on V1 as possible before getting to V2, V3, V4, etc.
Sure.
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