On Sat, Jun 17, 2023 at 6:01 AM Bjorn Helgaas <helgaas@xxxxxxxxxx> wrote: > > On Thu, Jun 15, 2023 at 03:04:20PM +0800, Kai-Heng Feng wrote: > > When a PCIe device is hotplugged to a Thunderbolt port, ASPM is not > > enabled for that device. However, when the device is plugged preboot, > > ASPM is enabled by default. > > > > The disparity happens because BIOS doesn't have the ability to program > > ASPM on hotplugged devices. > > > > So enable ASPM by default for external connected PCIe devices so ASPM > > settings are consitent between preboot and hotplugged. > > > > On HP Thunderbolt Dock G4, enable ASPM can also fix BadDLLP error: > > pcieport 0000:00:1d.0: AER: Corrected error received: 0000:07:04.0 > > pcieport 0000:07:04.0: PCIe Bus Error: severity=Corrected, type=Data Link Layer, (Receiver ID) > > pcieport 0000:07:04.0: device [8086:0b26] error status/mask=00000080/00002000 > > pcieport 0000:07:04.0: [ 7] BadDLLP > > > > The root cause is still unclear, but quite likely because the I225 on > > the dock supports PTM, where ASPM timing is precalculated for the PTM. > > > Link: https://bugzilla.kernel.org/show_bug.cgi?id=217557 > > I know you said this isn't clear yet, but I don't see a connection > between ASPM being enabled and PTM. If anything, *disabling* ASPM > should be safer if there's a timing issue. If PTM timing is tested when ASPM is enabled, there can be a strong connection between the two. I'll raise the issue to IGC devs. > > I assume the ASPM timing you refer to is the LTR snoop/no snoop > latency, since that's the only timing difference I see in the lspci > output in bugzilla? Not only LTR. ASPM L0s and L1 are not enabled when devices are hotplugged. Kai-Heng > > I don't see any PTM differences there. > > Bjorn
