Hi,
The SoCs making use of Qualcomm PCIe controllers do not support the PCIe hotplug
functionality. But the hotplug capability bit is set by default in the hardware.
This causes the kernel PCI core to register hotplug service for the controller
and send hotplug commands to it. But those commands will timeout generating
messages as below during boot and suspend/resume.
[ 5.782159] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x03c0 (issued 2020 msec ago)
[ 5.810161] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x03c0 (issued 2048 msec ago)
[ 7.838162] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x07c0 (issued 2020 msec ago)
[ 7.870159] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x07c0 (issued 2052 msec ago)
This not only spams the console output but also induces a delay of a couple of
seconds. To fix this issue, this series clears the HPC bit in PCI_EXP_SLTCAP
register as a part of the post init sequence for all IP versions to not
advertise the hotplug capability for the controller.
Testing
=======
This series has been tested on DB845c (SDM845 SoC) and Lenovo Thinkpad X13s
(SC8280XP SoC).
Thanks,
Mani
Changes in v2:
* Collected tags
* Moved the HPC clearing to a separate function and reused across different
configs
Manivannan Sadhasivam (8):
PCI: qcom: Use DWC helpers for modifying the read-only DBI registers
PCI: qcom: Disable write access to read only registers for IP v2.9.0
PCI: qcom: Do not advertise hotplug capability for IPs v2.7.0 and
v1.9.0
PCI: qcom: Do not advertise hotplug capability for IPs v2.3.3 and
v2.9.0
PCI: qcom: Do not advertise hotplug capability for IP v2.3.2
PCI: qcom: Use post init sequence of IP v2.3.2 for v2.4.0
PCI: qcom: Do not advertise hotplug capability for IP v1.0.0
PCI: qcom: Do not advertise hotplug capability for IP v2.1.0
drivers/pci/controller/dwc/pcie-qcom.c | 73 ++++++++++++++------------
1 file changed, 38 insertions(+), 35 deletions(-)
--
2.25.1
