On Thu, Feb 23, 2023 at 07:01:21PM +0800, Yang Su wrote:
> But in your patch the pci_bridge_wait_for_secondary_bus() we only check
> the first subordinate device of the bridge whether ready via
> pci_dev_wait().
>
> Why not wait all the downstream devices become ready? As Sheng Bi
> Introduce pci_bridge_secondary_bus_wait() to fix 6b2f1351af56
> ("PCI: Wait for device to become ready after secondary bus reset"),
> using list_for_each_entry.
>
> https://lore.kernel.org/linux-pci/20220523171517.32407-1-windy.bi.enflame@xxxxxxxxx/
At least for PCIe it shouldn't matter as the other pci_devs below
the bridge can only be additional functions of a multifunction
device. My expectation would be that if the first function
is accessible, all the others are as well.
Checking for accessibility of all pci_devs introduces additional
complexity and I think should only be done if there are actual
real-world use cases that need it.
> Last, I want to know if all the downstrem devices are ready, how can we
> ensure pci bridge is ready?
>
> From now version_2 series patch, there is lack checking of the pci bridge.
I don't quite follow. The PCI bridge is the one whose secondary bus
was reset, right? The PCI bridge's accessibility is unaffected by it
issuing a the Secondary Bus Reset.
Thanks,
Lukas
