On Thu, Feb 16, 2023 at 11:58:22AM -0600, Bjorn Helgaas wrote:
> On Thu, Feb 16, 2023 at 06:20:12PM +0900, Yoshihiro Shimoda wrote:
> > The "val" of PCIE_PORT_LINK_CONTROL will be reused on the
> > "Set the number of lanes". But, if snps,enable-cdm-check" exists,
> > the "val" will be set to PCIE_PL_CHK_REG_CONTROL_STATUS.
> > Therefore, unexpected register value is possible to be used
> > to PCIE_PORT_LINK_CONTROL register if snps,enable-cdm-check" exists.
> > So, read PCIE_PORT_LINK_CONTROL register again to fix the issue.
> >
> > Fixes: ec7b952f453c ("PCI: dwc: Always enable CDM check if "snps,enable-cdm-check" exists")
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
> > ---
> > drivers/pci/controller/dwc/pcie-designware.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> > index 6d5d619ab2e9..3bb9ca14fb9c 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware.c
> > +++ b/drivers/pci/controller/dwc/pcie-designware.c
> > @@ -824,6 +824,7 @@ void dw_pcie_setup(struct dw_pcie *pci)
> > }
> >
> > /* Set the number of lanes */
> > + val = dw_pcie_readl_dbi(pci, PCIE_PORT_LINK_CONTROL);
>
> Definitely a bug, thanks for the fix and the Fixes: tag.
>
> But I would like the whole function better if it could be structured
> so we read PCIE_PORT_LINK_CONTROL once and wrote it once. And the
> same for PCIE_LINK_WIDTH_SPEED_CONTROL.
>
I don't see a good looking solution for what you suggest. We'd need to
use additional temporary vars and gotos to implement that.
> Maybe there's a reason PCIE_PL_CHK_REG_CONTROL_STATUS must be written
> between the two PCIE_PORT_LINK_CONTROL writes or the two
> PCIE_LINK_WIDTH_SPEED_CONTROL writes, I dunno. If so, a comment there
> about why that is would be helpful.
There were no sign of dependencies between the CDM-check enabling and
the rest of the setting performed in the dw_pcie_setup() function.
Originally the CDM-check was placed at the tail of the function:
07f123def73e ("PCI: dwc: Add support to enable CDM register check")
with no comments why it was placed there exactly. Moreover I got the
Rb-tag for my fix from Vidya Sagar, the original patch author. So he
was ok with the suggested solution.
-Serge(y)
>
> > val &= ~PORT_LINK_FAST_LINK_MODE;
> > val &= ~PORT_LINK_MODE_MASK;
> > switch (pci->num_lanes) {
> > --
> > 2.25.1
> >
>
