On 2022/11/23 6:04, Han Jingoo wrote:
On Mon, Nov 21, 2022 Shawn Lin <shawn.lin@xxxxxxxxxxxxxx> wrote:
Some SoCs may only support 1 RC with a few MSIs support that the total number of MSIs is
less than MAX_MSI_IRQS_PER_CTRL. In this case, num_ctrls will be zero which fails setting
up MSI support. Fix it by rounding up num_ctrls to at least one.
Signed-off-by: Shawn Lin <shawn.lin@xxxxxxxxxxxxxx>
Acked-by: Jingoo Han <jingoohan1@xxxxxxxxx>
Thanks, Jingoo!
Hi Lorenzo,
Is there any chance this patch be applied? :)
Best regards,
Jingoo Han
---
Changes in v2:
- set num_ctrls to 1 if it's less than one
drivers/pci/controller/dwc/pcie-designware-host.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 39f3b37..cfce1e0 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -62,6 +62,8 @@ irqreturn_t dw_handle_msi_irq(struct dw_pcie_rp *pp)
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;
+ if (num_ctrls < 1)
+ num_ctrls = 1;
for (i = 0; i < num_ctrls; i++) {
status = dw_pcie_readl_dbi(pci, PCIE_MSI_INTR0_STATUS +
@@ -343,6 +345,8 @@ static int dw_pcie_msi_host_init(struct dw_pcie_rp *pp)
if (!pp->num_vectors)
pp->num_vectors = MSI_DEF_NUM_VECTORS;
num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;
+ if (num_ctrls < 1)
+ num_ctrls = 1;
if (!pp->msi_irq[0]) {
pp->msi_irq[0] = platform_get_irq_byname_optional(pdev, "msi");
@@ -707,6 +711,8 @@ int dw_pcie_setup_rc(struct dw_pcie_rp *pp)
if (pp->has_msi_ctrl) {
num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;
+ if (num_ctrls < 1)
+ num_ctrls = 1;
/* Initialize IRQ Status array */
for (ctrl = 0; ctrl < num_ctrls; ctrl++) {
--
2.7.4
