On Sun, Nov 27, 2022 at 10:28:41PM -0800, Sathyanarayanan Kuppuswamy wrote: > > > On 11/24/22 1:35 AM, Mika Westerberg wrote: > > Only Root Ports and Event Collectors use MSI for AER. PCIe Switch ports > > or endpoints on the other hand only send messages (that get collected by > > the former). For this reason do not require PCIe switch ports and > > endpoints to use interrupt if they support AER. > > > > This allows portdrv to attach to recent Intel PCIe switch ports that > > don't declare MSI or legacy interrupts. > > "Recent" looks vague. Maybe you can be more specific here. Okay, maybe something like "This allows portdrv to attach PCIe switch ports of Intel DG1 and DG2 discrete graphics cards. These do not declare MSI or legacy interrupts." I will do this change in v2. > Otherwise, it looks good to me. Thanks!
